Softbank_ARM

ARM sold to Japanese Softbank

Numerous media outlets are reporting the sale of chip designer ARM for £24bn to Japan’s Softbank. ARM being a very successful company in both economic and technical terms, this is huge news for the industry.

ARM stock quote

The company’s NASDAQ price went up by 40% in a step function

Sales and profits both look healthy for the Cambridge chip maker and a deal with Softbank, the company also invovled with Alibaba, will allow ARM to take an even stronger position in the IoT world. Some analysts claim ARM will now have to allay fears of market saturation, while others ask whether it was not sold too cheaply. Interestingly enough, the CEO Simon Gears claims that as much as 60% of ARM chips go into non-smartphone markets.

ARM itself does not make chips and makes money off of royalties paid by other tech giants, including Apple and Samsung.

Reference: http://www.bbc.com/news/business-36822272

MIT Swarm concept

MIT produces Swarm chip for “easy parallel programming”

MIT has a long standing history of producing computing innovation. Their latest research is focused on what they call a “Swarm” chip, which is aimed at simplifying parallel coding by removing explicit synchronization and minimizing the interference of processors. This is in contrast to classic Intel-like chips with coherent caches — which, by the way, will have to change, but that is a subject of another discussion.

Applications tested on the processor ran 3-18x faster, while needing in the order of 1/10th of the code usually required. MIT says that the processor time-stamps tasks internally and then automatically determines which should be worked on first by the whole chip.

Task-based processing systems are gaining more and more popularity as programmers are reaching the limits of data parallelism for many common problems. This is well seen in the rise of popularity of programming environments such as Intel’s Threading Building Blocks, Cilk+ and task additions to the OpenMP standard. Swarm does some of this in hardware, promising new avenues for acceleration with minimal overhead in code.

Involved in the design was Joel Emer, who was also one of the key people behind the Triggered Instructions concept, in the domain of spatial programming.

Reference: http://news.mit.edu/2016/parallel-programming-easy-0620

UC Davis kilocore chip

UC Davis makes 1,000-Processor Chip

Researchers from UC Davis report the creation of a 1000-processor chip.

With a friendly name of “Kilocore”, the 32nm chip has 0.6 bn transistors and can process up to 1.8 Tera-ops per second. Researchers claim it is up to 100x more efficient than a standard laptop chip. The brief listed in the footer gives plenty of technical details of this achievement, but the most interesting is probably the table below:

kilocore chars

Power and performance characteristics of the kilocore chip

As we can see, frequency varies from 115 MHz to 1.7 GHz and pJ/op from 5.8 to 21.9. At the maximum frequency, the cores dissipate roughly 40 Watts. What is also notable in this case is that the impressive parameters were achieved in a university design, and not by a major chip maker.

IBM provided the silicon.

References:

Press release: https://www.ucdavis.edu/news/worlds-first-1000-processor-chip

Brief: http://vcl.ece.ucdavis.edu/pubs/2016.06.vlsi.symp.kiloCore/2016.vlsi.symp.kiloCore.pdf

TIK launches a blog

TIK Services is launching a blog today, which will be occasionally updated with original technical articles, HPC and computing news, and news from the company. Follow us on LinkedIn or through RSS to get the latest updates.

Also, don’t hesitate to get in touch if you would like to contribute, suggest some content or point out improvements.